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authorgraysky2021-04-09 07:39:36 -0400
committergraysky2021-04-09 07:39:36 -0400
commitcbd0077eb86b8868416175d4f57769c2535daedb (patch)
tree4a53241564162e07f13966ccf51aee61a795fd40
parent657876bc72f2eb2af2f6ff188103013a2013b458 (diff)
downloadaur-cbd0077eb86b8868416175d4f57769c2535daedb.tar.gz
Update to 5.11.13rc1-1
-rw-r--r--.SRCINFO26
-rw-r--r--0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch16
-rw-r--r--0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch71
-rw-r--r--0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch107
-rw-r--r--0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch115
-rw-r--r--0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch167
-rw-r--r--PKGBUILD25
-rw-r--r--config180
8 files changed, 674 insertions, 33 deletions
diff --git a/.SRCINFO b/.SRCINFO
index 69032cbdd92..a9171d0f1e0 100644
--- a/.SRCINFO
+++ b/.SRCINFO
@@ -1,5 +1,5 @@
pkgbase = linux-rc
- pkgver = 5.11.11rc1
+ pkgver = 5.11.13rc1
pkgrel = 1
url = https://www.kernel.org/
arch = x86_64
@@ -12,20 +12,28 @@ pkgbase = linux-rc
makedepends = tar
makedepends = xz
options = !strip
- source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.11-rc1.xz
- source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.11-rc1.sign
- source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.10.tar.xz
- source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.10.tar.sign
+ source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.13-rc1.xz
+ source = https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.11.13-rc1.sign
+ source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.12.tar.xz
+ source = https://www.kernel.org/pub/linux/kernel/v5.x/linux-5.11.12.tar.sign
source = config
source = 0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+ source = 0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch
+ source = 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
+ source = 0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
+ source = 0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
validpgpkeys = ABAF11C65A2970B130ABE3C479BE3E4300411886
validpgpkeys = 647F28654894E3BD457199BE38DBBDC86092693E
- b2sums = b836fbbf9d67d94d067ee79958bd83a189d5798321371b2f3dfa3cc4d0acd75006a117bdf16fef4fb312ed86ec2c4dcac466741c75429dc87c086d8439a32032
+ b2sums = eac29e11f7cc51f09f849f390d0884019033398a129b26486ac0829d57bd925cf10d962725c7485700daf3aba6a098db34e914f62f675c19b3f5910a48817566
b2sums = SKIP
- b2sums = 84b97aeb190d570144d0e315edf8c0b51fd92a70f94a30f08ef49a65eedd48ee135b2c2f3a1a2827ace96fef2d1963e83948790c7729f3d7c1f615f8d32c9656
+ b2sums = 1defa8e4ef10663e48f62f9c9f7d3a35dd52d6aeaa91fa08371ae96c73a3098196c0e0a17beb78b8a6e246cc51ff3e3e59ffb85abb94c2bd8c14b8282e1e82bc
b2sums = SKIP
- b2sums = 8a0e1fb03037e57df8de81856a0bdb94e393d9336b587b1c907c6e4ed15abfa6c86634131ebbfab45eeb6b423bf467536ad0543efbef2586645ade016c32a013
- b2sums = eab8a07469cff83526e5fef59d72d9c2c539432c161298cb61a09c25d55528e495b4d9dd0ff527d3e5900b8adb3f973f6601ea35837f04bf0c2794eaf04bc6ad
+ b2sums = 4f43af91d2b6a3ddca56c187595538b1920fbc5a9ec87cb7c714501f7a03ec8513c7ef09e76ac9350feb815e09c68b57fca6adb1d47c41d7583d7e1ff5a5de08
+ b2sums = 2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef
+ b2sums = b1cdc2e8d99ff59d57897fc99aa2a11b07f96f9461420d6d8d499fb4ff0740e317a8f9ede72b3041018ac89ab07a53c0014d19c06a9bb038055c4d5ed79f3b0d
+ b2sums = ce586c65af54313c93e4dc55d56cf46840ac1b6a4f2a83b115529f4d9ef402158d28fa042967f1b685a11955371360513662f4b2eb1c75b5bba2ecd7ec31d8a9
+ b2sums = 5a93bf75f5c9995270af06d8ded3e57f53f0a11fd5c2e24909c9af9140a5275555c0ae7d50b2a064d76517d6d3536beb7850930ab5aec829be81b59b5a6b55aa
+ b2sums = 782e1ddb0400a7155b92f71e86ab1e717d3dbd159b4f003d2d4bdcd0baa660466ecdbc899f3b5e371c7e7400a940d4de0a3e46ff7418a641cd614ed738b16c86
pkgname = linux-rc
pkgdesc = The release candidate kernel and modules
diff --git a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
index 557c175d020..0a774034cf7 100644
--- a/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+++ b/0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
@@ -1,7 +1,7 @@
-From 09c2db93ed0eb09d84273c16e830156e2307e345 Mon Sep 17 00:00:00 2001
+From f904ba21627dd22bd38c9696bd542fecc7abe429 Mon Sep 17 00:00:00 2001
From: "Jan Alexander Steffens (heftig)" <jan.steffens@gmail.com>
Date: Mon, 16 Sep 2019 04:53:20 +0200
-Subject: [PATCH 1/5] ZEN: Add sysctl and CONFIG to disallow unprivileged
+Subject: [PATCH 1/6] ZEN: Add sysctl and CONFIG to disallow unprivileged
CLONE_NEWUSER
Our default behavior continues to match the vanilla kernel.
@@ -36,7 +36,7 @@ index 64cf8ebdc4ec..bd29529ac188 100644
{
return &init_user_ns;
diff --git a/init/Kconfig b/init/Kconfig
-index 29ad68325028..96b79cfb2845 100644
+index b7d3c6a12196..9e8a5351063e 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1172,6 +1172,22 @@ config USER_NS
@@ -63,7 +63,7 @@ index 29ad68325028..96b79cfb2845 100644
bool "PID Namespaces"
default y
diff --git a/kernel/fork.c b/kernel/fork.c
-index d66cd1014211..231a94ffd302 100644
+index 808af2cc8ab6..09658cb5317e 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -97,6 +97,10 @@
@@ -77,7 +77,7 @@ index d66cd1014211..231a94ffd302 100644
#include <asm/pgalloc.h>
#include <linux/uaccess.h>
#include <asm/mmu_context.h>
-@@ -1864,6 +1868,10 @@ static __latent_entropy struct task_struct *copy_process(
+@@ -1872,6 +1876,10 @@ static __latent_entropy struct task_struct *copy_process(
if ((clone_flags & (CLONE_NEWUSER|CLONE_FS)) == (CLONE_NEWUSER|CLONE_FS))
return ERR_PTR(-EINVAL);
@@ -88,7 +88,7 @@ index d66cd1014211..231a94ffd302 100644
/*
* Thread groups must share signals as well, and detached threads
* can only be started up within the thread group.
-@@ -2933,6 +2941,12 @@ int ksys_unshare(unsigned long unshare_flags)
+@@ -2941,6 +2949,12 @@ int ksys_unshare(unsigned long unshare_flags)
if (unshare_flags & CLONE_NEWNS)
unshare_flags |= CLONE_FS;
@@ -102,7 +102,7 @@ index d66cd1014211..231a94ffd302 100644
if (err)
goto bad_unshare_out;
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
-index c9fbdd848138..1fbf5d551fa0 100644
+index 62fbd09b5dc1..01192edd25f3 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -103,6 +103,9 @@
@@ -150,5 +150,5 @@ index af612945a4d0..95c54dae4aa1 100644
static DEFINE_MUTEX(userns_state_mutex);
--
-2.30.1
+2.31.1
diff --git a/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch b/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch
new file mode 100644
index 00000000000..9a15c75a9c5
--- /dev/null
+++ b/0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch
@@ -0,0 +1,71 @@
+From 604d731ed0605ad0d7019b282d8774c220485677 Mon Sep 17 00:00:00 2001
+From: David Woodhouse <dwmw@amazon.co.uk>
+Date: Mon, 15 Mar 2021 11:15:02 +0000
+Subject: [PATCH 2/6] iommu/amd: Don't initialise remapping irqdomain if IOMMU
+ is disabled
+
+When the IOMMU is disabled, the driver still enumerates and initialises
+the hardware in order to turn it off. Because IRQ remapping setup is
+done early, the irqdomain is set up opportunistically.
+
+In commit b34f10c2dc59 ("iommu/amd: Stop irq_remapping_select() matching
+when remapping is disabled") I already make the irq_remapping_select()
+function check the amd_iommu_irq_setup flag because that might get
+cleared only after the irqdomain setup is done, when the IVRS is parsed.
+
+However, in the case where 'amd_iommu=off' is passed on the command line,
+the IRQ remapping setup isn't done but the amd_iommu_irq_setup flag is
+still set by the early IRQ remap init code. Stop it doing that, by
+bailing out of amd_iommu_prepare() early when it's disabled.
+
+This avoids the crash in irq_remapping_select() as it dereferences the
+NULL amd_iommu_rlookup_table[]:
+
+[ 0.243659] Switched APIC routing to physical x2apic.
+[ 0.262206] BUG: kernel NULL pointer dereference, address: 0000000000000500
+[ 0.262927] #PF: supervisor read access in kernel mode
+[ 0.263390] #PF: error_code(0x0000) - not-present page
+[ 0.263844] PGD 0 P4D 0
+[ 0.264135] Oops: 0000 [#1] SMP PTI
+[ 0.264460] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.12.0-rc3 #831
+[ 0.265069] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-1.fc33 04/01/2014
+[ 0.265825] RIP: 0010:irq_remapping_select+0x57/0xb0
+[ 0.266327] Code: 4b 0c 48 3d 30 e0 a7 9e 75 0d eb 35 48 8b 00 48 3d 30 e0 a7 9e 74 2a 0f b6 50 10 39 d1 75 ed 0f b7 40 12 48 8b 15 69 e3 d2 01 <48> 8b 14 c2 48 85 d2 74 0e b8 01 00 00 00 48 3b aa 90 04 00 00 74
+[ 0.268412] RSP: 0000:ffffffff9e803db0 EFLAGS: 00010246
+[ 0.268919] RAX: 00000000000000a0 RBX: ffffffff9e803df8 RCX: 0000000000000000
+[ 0.269550] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff98120112fe79
+[ 0.270245] RBP: ffff9812011c8218 R08: 0000000000000001 R09: 000000000000000a
+[ 0.270922] R10: 000000000000000a R11: f000000000000000 R12: ffff9812011c8218
+[ 0.271549] R13: ffff98120181ed88 R14: 0000000000000000 R15: 0000000000000000
+[ 0.272221] FS: 0000000000000000(0000) GS:ffff98127dc00000(0000) knlGS:0000000000000000
+[ 0.272997] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
+[ 0.273508] CR2: 0000000000000500 CR3: 0000000030810000 CR4: 00000000000006b0
+[ 0.274178] Call Trace:
+[ 0.274416] irq_find_matching_fwspec+0x41/0xc0
+[ 0.274812] mp_irqdomain_create+0x65/0x150
+[ 0.275251] setup_IO_APIC+0x70/0x811
+
+Fixes: a1a785b57242 ("iommu/amd: Implement select() method on remapping irqdomain")
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=212017
+Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
+---
+ drivers/iommu/amd/init.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
+index 78339b0bb8e5..398909dab640 100644
+--- a/drivers/iommu/amd/init.c
++++ b/drivers/iommu/amd/init.c
+@@ -2998,6 +2998,9 @@ int __init amd_iommu_prepare(void)
+ {
+ int ret;
+
++ if (amd_iommu_disabled)
++ return -ENODEV;
++
+ amd_iommu_irq_remap = true;
+
+ ret = iommu_go_to_state(IOMMU_ACPI_FINISHED);
+--
+2.31.1
+
diff --git a/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch b/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
new file mode 100644
index 00000000000..e8d116c2526
--- /dev/null
+++ b/0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
@@ -0,0 +1,107 @@
+From 1b5f96a934af463ddb037b78871afe8a3524e665 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 20:48:59 +0200
+Subject: [PATCH 3/6] drm/i915/ilk-glk: Fix link training on links with LTTPRs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry-picked from intel-drm-next 984982f3ef7b240cd24c2feb2762d81d9d8da3c2
+
+The spec requires to use at least 3.2ms for the AUX timeout period if
+there are LT-tunable PHY Repeaters on the link (2.11.2). An upcoming
+spec update makes this more specific, by requiring a 3.2ms minimum
+timeout period for the LTTPR detection reading the 0xF0000-0xF0007
+range (3.6.5.1).
+
+Accordingly disable LTTPR detection until GLK, where the maximum timeout
+we can set is only 1.6ms.
+
+Link training in the non-transparent mode is known to fail at least on
+some SKL systems with a WD19 dock on the link, which exposes an LTTPR
+(see the References below). While this could have different reasons
+besides the too short AUX timeout used, not detecting LTTPRs (and so not
+using the non-transparent LT mode) fixes link training on these systems.
+
+While at it add a code comment about the platform specific maximum
+timeout values.
+
+v2: Add a comment about the g4x maximum timeout as well. (Ville)
+
+Reported-by: Takashi Iwai <tiwai@suse.de>
+Reported-and-tested-by: Santiago Zarate <santiago.zarate@suse.com>
+Reported-and-tested-by: Bodo Graumann <mail@bodograumann.de>
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/3166
+Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Takashi Iwai <tiwai@suse.de>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317184901.4029798-2-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++
+ .../gpu/drm/i915/display/intel_dp_link_training.c | 15 ++++++++++++---
+ 2 files changed, 19 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 8a26307c4896..1930df9a8bcc 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -1400,6 +1400,7 @@ static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
+ else
+ precharge = 5;
+
++ /* Max timeout value on G4x-BDW: 1.6ms */
+ if (IS_BROADWELL(dev_priv))
+ timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
+ else
+@@ -1426,6 +1427,12 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
+ enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+ u32 ret;
+
++ /*
++ * Max timeout values:
++ * SKL-GLK: 1.6ms
++ * CNL: 3.2ms
++ * ICL+: 4ms
++ */
+ ret = DP_AUX_CH_CTL_SEND_BUSY |
+ DP_AUX_CH_CTL_DONE |
+ DP_AUX_CH_CTL_INTERRUPT |
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index d8c6d7054d11..f916b9f04b6b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -93,6 +93,18 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp,
+
+ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+ {
++ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
++
++ if (intel_dp_is_edp(intel_dp))
++ return false;
++
++ /*
++ * Detecting LTTPRs must be avoided on platforms with an AUX timeout
++ * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).
++ */
++ if (INTEL_GEN(i915) < 10)
++ return false;
++
+ if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ intel_dp->lttpr_common_caps) < 0) {
+ memset(intel_dp->lttpr_common_caps, 0,
+@@ -138,9 +150,6 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ bool ret;
+ int i;
+
+- if (intel_dp_is_edp(intel_dp))
+- return 0;
+-
+ ret = intel_dp_read_lttpr_common_caps(intel_dp);
+
+ /*
+--
+2.31.1
+
diff --git a/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch b/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
new file mode 100644
index 00000000000..cdaf266318c
--- /dev/null
+++ b/0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
@@ -0,0 +1,115 @@
+From a14c9499777b921bbbd3c912daf87e103c5b4fcb Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Mon, 18 Jan 2021 20:31:43 +0200
+Subject: [PATCH 4/6] drm/i915/dp: Prevent setting the LTTPR LT mode if no
+ LTTPRs are detected
+
+Cherry-picked from 3b7bbb3619d2cc92f04ba10ad27d3b616aabf175
+
+Atm, the driver programs explicitly the default transparent link
+training mode (0x55) to DP_PHY_REPEATER_MODE even if no LTTPRs are
+detected.
+
+This conforms to the spec (3.6.6.1):
+"DP upstream devices that do not enable the Non-transparent mode of
+ LTTPRs shall program the PHY_REPEATER_MODE register (DPCD Address
+ F0003h) to 55h (default) prior to link training"
+
+however writing the default value to this DPCD register seems to cause
+occasional link training errors at least for a DELL WD19TB TBT dock, when
+no LTTPRs are detected.
+
+Writing to DP_PHY_REPEATER_MODE will also cause an unnecessary timeout
+on systems without any LTTPR.
+
+To fix the above two issues let's assume that setting the default mode
+is redundant when no LTTPRs are detected. Keep the existing behavior and
+program the default mode if more than 8 LTTPRs are detected or in case
+the read from DP_PHY_REPEATER_CNT returns an invalid value.
+
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/2801
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210118183143.1145707-1-imre.deak@intel.com
+---
+ .../drm/i915/display/intel_dp_link_training.c | 36 ++++++++-----------
+ 1 file changed, 15 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index f916b9f04b6b..0359d5936901 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,18 +34,6 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ link_status[3], link_status[4], link_status[5]);
+ }
+
+-static int intel_dp_lttpr_count(struct intel_dp *intel_dp)
+-{
+- int count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+-
+- /*
+- * Pretend no LTTPRs in case of LTTPR detection error, or
+- * if too many (>8) LTTPRs are detected. This translates to link
+- * training in transparent mode.
+- */
+- return count <= 0 ? 0 : count;
+-}
+-
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -151,6 +139,17 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ int i;
+
+ ret = intel_dp_read_lttpr_common_caps(intel_dp);
++ if (!ret)
++ return 0;
++
++ lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
++ /*
++ * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
++ * detected as this breaks link training at least on the Dell WD19TB
++ * dock.
++ */
++ if (lttpr_count == 0)
++ return 0;
+
+ /*
+ * See DP Standard v2.0 3.6.6.1. about the explicit disabling of
+@@ -159,17 +158,12 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+ */
+ intel_dp_set_lttpr_transparent_mode(intel_dp, true);
+
+- if (!ret)
+- return 0;
+-
+- lttpr_count = intel_dp_lttpr_count(intel_dp);
+-
+ /*
+ * In case of unsupported number of LTTPRs or failing to switch to
+ * non-transparent mode fall-back to transparent link training mode,
+ * still taking into account any LTTPR common lane- rate/count limits.
+ */
+- if (lttpr_count == 0)
++ if (lttpr_count < 0)
+ return 0;
+
+ if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
+@@ -231,11 +225,11 @@ intel_dp_phy_is_downstream_of_source(struct intel_dp *intel_dp,
+ enum drm_dp_phy dp_phy)
+ {
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+- int lttpr_count = intel_dp_lttpr_count(intel_dp);
++ int lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+
+- drm_WARN_ON_ONCE(&i915->drm, lttpr_count == 0 && dp_phy != DP_PHY_DPRX);
++ drm_WARN_ON_ONCE(&i915->drm, lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);
+
+- return lttpr_count == 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
++ return lttpr_count <= 0 || dp_phy == DP_PHY_LTTPR(lttpr_count - 1);
+ }
+
+ static u8 intel_dp_phy_voltage_max(struct intel_dp *intel_dp,
+--
+2.31.1
+
diff --git a/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch b/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
new file mode 100644
index 00000000000..80c2cf98f15
--- /dev/null
+++ b/0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
@@ -0,0 +1,167 @@
+From bc74b7fc2c75cf5f1844bb24a2caea4140937ac6 Mon Sep 17 00:00:00 2001
+From: Imre Deak <imre.deak@intel.com>
+Date: Wed, 17 Mar 2021 21:01:49 +0200
+Subject: [PATCH 5/6] drm/i915: Disable LTTPR support when the DPCD rev < 1.4
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Cherry picked from intel-drm-next 264613b406eb0d74cd9ca582c717c5e2c5a975ea
+
+By the specification the 0xF0000-0xF02FF range is only valid when the
+DPCD revision is 1.4 or higher. Disable LTTPR support if this isn't so.
+
+Trying to detect LTTPRs returned corrupted values for the above DPCD
+range at least on a Skylake host with an LG 43UD79-B monitor with a DPCD
+revision 1.2 connected.
+
+v2: Add the actual version check.
+v3: Fix s/DRPX/DPRX/ typo.
+
+Fixes: 7b2a4ab8b0ef ("drm/i915: Switch to LTTPR transparent mode link training")
+Cc: <stable@vger.kernel.org> # v5.11
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Imre Deak <imre.deak@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20210317190149.4032966-1-imre.deak@intel.com
+---
+ drivers/gpu/drm/i915/display/intel_dp.c | 4 +-
+ .../drm/i915/display/intel_dp_link_training.c | 48 ++++++++++++++-----
+ .../drm/i915/display/intel_dp_link_training.h | 2 +-
+ 3 files changed, 39 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 1930df9a8bcc..bc2aae63fe40 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -4878,9 +4878,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
+ {
+ int ret;
+
+- intel_dp_lttpr_init(intel_dp);
+-
+- if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd))
++ if (intel_dp_init_lttpr_and_dprx_caps(intel_dp) < 0)
+ return false;
+
+ /*
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+index 0359d5936901..e6532ea5757b 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+@@ -34,6 +34,11 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE])
+ link_status[3], link_status[4], link_status[5]);
+ }
+
++static void intel_dp_reset_lttpr_common_caps(struct intel_dp *intel_dp)
++{
++ memset(&intel_dp->lttpr_common_caps, 0, sizeof(intel_dp->lttpr_common_caps));
++}
++
+ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp)
+ {
+ intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT -
+@@ -95,8 +100,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp)
+
+ if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,
+ intel_dp->lttpr_common_caps) < 0) {
+- memset(intel_dp->lttpr_common_caps, 0,
+- sizeof(intel_dp->lttpr_common_caps));
++ intel_dp_reset_lttpr_common_caps(intel_dp);
+ return false;
+ }
+
+@@ -118,30 +122,49 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
+ }
+
+ /**
+- * intel_dp_lttpr_init - detect LTTPRs and init the LTTPR link training mode
++ * intel_dp_init_lttpr_and_dprx_caps - detect LTTPR and DPRX caps, init the LTTPR link training mode
+ * @intel_dp: Intel DP struct
+ *
+- * Read the LTTPR common capabilities, switch to non-transparent link training
+- * mode if any is detected and read the PHY capabilities for all detected
+- * LTTPRs. In case of an LTTPR detection error or if the number of
++ * Read the LTTPR common and DPRX capabilities and switch to non-transparent
++ * link training mode if any is detected and read the PHY capabilities for all
++ * detected LTTPRs. In case of an LTTPR detection error or if the number of
+ * LTTPRs is more than is supported (8), fall back to the no-LTTPR,
+ * transparent mode link training mode.
+ *
+ * Returns:
+- * >0 if LTTPRs were detected and the non-transparent LT mode was set
++ * >0 if LTTPRs were detected and the non-transparent LT mode was set. The
++ * DPRX capabilities are read out.
+ * 0 if no LTTPRs or more than 8 LTTPRs were detected or in case of a
+- * detection failure and the transparent LT mode was set
++ * detection failure and the transparent LT mode was set. The DPRX
++ * capabilities are read out.
++ * <0 Reading out the DPRX capabilities failed.
+ */
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp)
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)
+ {
+ int lttpr_count;
+ bool ret;
+ int i;
+
+ ret = intel_dp_read_lttpr_common_caps(intel_dp);
++
++ /* The DPTX shall read the DPRX caps after LTTPR detection. */
++ if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd)) {
++ intel_dp_reset_lttpr_common_caps(intel_dp);
++ return -EIO;
++ }
++
+ if (!ret)
+ return 0;
+
++ /*
++ * The 0xF0000-0xF02FF range is only valid if the DPCD revision is
++ * at least 1.4.
++ */
++ if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) {
++ intel_dp_reset_lttpr_common_caps(intel_dp);
++ return 0;
++ }
++
+ lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+ /*
+ * Prevent setting LTTPR transparent mode explicitly if no LTTPRs are
+@@ -181,7 +204,7 @@ int intel_dp_lttpr_init(struct intel_dp *intel_dp)
+
+ return lttpr_count;
+ }
+-EXPORT_SYMBOL(intel_dp_lttpr_init);
++EXPORT_SYMBOL(intel_dp_init_lttpr_and_dprx_caps);
+
+ static u8 dp_voltage_max(u8 preemph)
+ {
+@@ -817,7 +840,10 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp,
+ * TODO: Reiniting LTTPRs here won't be needed once proper connector
+ * HW state readout is added.
+ */
+- int lttpr_count = intel_dp_lttpr_init(intel_dp);
++ int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp);
++
++ if (lttpr_count < 0)
++ return;
+
+ if (!intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count))
+ intel_dp_schedule_fallback_link_training(intel_dp, crtc_state);
+diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+index 6a1f76bd8c75..9cb7c28027f0 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
++++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
+@@ -11,7 +11,7 @@
+ struct intel_crtc_state;
+ struct intel_dp;
+
+-int intel_dp_lttpr_init(struct intel_dp *intel_dp);
++int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp);
+
+ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+--
+2.31.1
+
diff --git a/PKGBUILD b/PKGBUILD
index 8789e31b4ed..db9944cb9dc 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -7,7 +7,7 @@ _srcname=linux-5.11
_major=5.11
### on initial release this is null otherwise it is the current stable subversion
### ie 1,2,3 corresponding $_major.1, $_major.3 etc
-_minor=10
+_minor=12
_minorc=$((_minor+1))
### on initial release this is just $_major
_fullver=$_major.$_minor
@@ -30,17 +30,25 @@ source=(
https://www.kernel.org/pub/linux/kernel/v5.x/linux-$_fullver.tar.{xz,sign}
config # the main kernel config file
0001-ZEN-Add-sysctl-and-CONFIG-to-disallow-unprivileged-C.patch
+ 0002-iommu-amd-Don-t-initialise-remapping-irqdomain-if-IO.patch
+ 0003-drm-i915-ilk-glk-Fix-link-training-on-links-with-LTT.patch
+ 0004-drm-i915-dp-Prevent-setting-the-LTTPR-LT-mode-if-no-.patch
+ 0005-drm-i915-Disable-LTTPR-support-when-the-DPCD-rev-1.4.patch
)
validpgpkeys=(
'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds
'647F28654894E3BD457199BE38DBBDC86092693E' # Greg Kroah-Hartman
)
-b2sums=('b836fbbf9d67d94d067ee79958bd83a189d5798321371b2f3dfa3cc4d0acd75006a117bdf16fef4fb312ed86ec2c4dcac466741c75429dc87c086d8439a32032'
+b2sums=('eac29e11f7cc51f09f849f390d0884019033398a129b26486ac0829d57bd925cf10d962725c7485700daf3aba6a098db34e914f62f675c19b3f5910a48817566'
'SKIP'
- '84b97aeb190d570144d0e315edf8c0b51fd92a70f94a30f08ef49a65eedd48ee135b2c2f3a1a2827ace96fef2d1963e83948790c7729f3d7c1f615f8d32c9656'
+ '1defa8e4ef10663e48f62f9c9f7d3a35dd52d6aeaa91fa08371ae96c73a3098196c0e0a17beb78b8a6e246cc51ff3e3e59ffb85abb94c2bd8c14b8282e1e82bc'
'SKIP'
- '8a0e1fb03037e57df8de81856a0bdb94e393d9336b587b1c907c6e4ed15abfa6c86634131ebbfab45eeb6b423bf467536ad0543efbef2586645ade016c32a013'
- 'eab8a07469cff83526e5fef59d72d9c2c539432c161298cb61a09c25d55528e495b4d9dd0ff527d3e5900b8adb3f973f6601ea35837f04bf0c2794eaf04bc6ad')
+ '4f43af91d2b6a3ddca56c187595538b1920fbc5a9ec87cb7c714501f7a03ec8513c7ef09e76ac9350feb815e09c68b57fca6adb1d47c41d7583d7e1ff5a5de08'
+ '2c197117aa915971edb97ec98233d4c394f6790829486403bc51732a18fe12338d82e680ccafd138153affe9830d815ee1b52c7d1f3ed7937bc7a0c1fac3a5ef'
+ 'b1cdc2e8d99ff59d57897fc99aa2a11b07f96f9461420d6d8d499fb4ff0740e317a8f9ede72b3041018ac89ab07a53c0014d19c06a9bb038055c4d5ed79f3b0d'
+ 'ce586c65af54313c93e4dc55d56cf46840ac1b6a4f2a83b115529f4d9ef402158d28fa042967f1b685a11955371360513662f4b2eb1c75b5bba2ecd7ec31d8a9'
+ '5a93bf75f5c9995270af06d8ded3e57f53f0a11fd5c2e24909c9af9140a5275555c0ae7d50b2a064d76517d6d3536beb7850930ab5aec829be81b59b5a6b55aa'
+ '782e1ddb0400a7155b92f71e86ab1e717d3dbd159b4f003d2d4bdcd0baa660466ecdbc899f3b5e371c7e7400a940d4de0a3e46ff7418a641cd614ed738b16c86')
export KBUILD_BUILD_HOST=archlinux
@@ -48,8 +56,13 @@ export KBUILD_BUILD_USER=$pkgbase
export KBUILD_BUILD_TIMESTAMP="$(date -Ru${SOURCE_DATE_EPOCH:+d @$SOURCE_DATE_EPOCH})"
prepare() {
- cd linux-${_fullver}
+ # hacky work around for ck1 not getting extracted
+ # https://bbs.archlinux.org/viewtopic.php?id=265115
+ if [[ ! -f "$srcdir/$_rcpatch" ]]; then
+ xz -dc "$SRCDEST/$_rcpatch.xz" > "$_rcpatch"
+ fi
+ cd linux-${_fullver}
msg2 "Setting version..."
scripts/setlocalversion --save-scmversion
echo "-$pkgrel" > localversion.10-pkgrel
diff --git a/config b/config
index 132982a31bb..357bc9c2792 100644
--- a/config
+++ b/config
@@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
-# Linux/x86 5.11.9-arch1 Kernel Configuration
+# Linux/x86 5.11.11-arch1 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="gcc (GCC) 10.2.0"
CONFIG_CC_IS_GCC=y
@@ -1062,7 +1062,7 @@ CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
-# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_IDLE_PAGE_TRACKING=y
CONFIG_ARCH_HAS_PTE_DEVMAP=y
CONFIG_ZONE_DEVICE=y
CONFIG_DEV_PAGEMAP_OPS=y
@@ -7197,13 +7197,59 @@ CONFIG_USBIP_VHCI_HCD=m
CONFIG_USBIP_VHCI_HC_PORTS=8
CONFIG_USBIP_VHCI_NR_HCS=1
CONFIG_USBIP_HOST=m
+CONFIG_USBIP_VUDC=m
# CONFIG_USBIP_DEBUG is not set
-# CONFIG_USB_CDNS3 is not set
-# CONFIG_USB_MUSB_HDRC is not set
-# CONFIG_USB_DWC3 is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_CHIPIDEA is not set
-# CONFIG_USB_ISP1760 is not set
+CONFIG_USB_CDNS3=m
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_USB_CDNS3_PCI_WRAP=m
+CONFIG_USB_MUSB_HDRC=m
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_GADGET is not set
+CONFIG_USB_MUSB_DUAL_ROLE=y
+
+#
+# Platform Glue Layer
+#
+
+#
+# MUSB DMA mode
+#
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_DWC3=m
+CONFIG_USB_DWC3_ULPI=y
+# CONFIG_USB_DWC3_HOST is not set
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_DUAL_ROLE=y
+
+#
+# Platform Glue Driver Support
+#
+CONFIG_USB_DWC3_PCI=m
+CONFIG_USB_DWC3_HAPS=m
+CONFIG_USB_DWC2=m
+# CONFIG_USB_DWC2_HOST is not set
+
+#
+# Gadget/Dual-role mode requires USB Gadget support to be enabled
+#
+# CONFIG_USB_DWC2_PERIPHERAL is not set
+CONFIG_USB_DWC2_DUAL_ROLE=y
+CONFIG_USB_DWC2_PCI=m
+# CONFIG_USB_DWC2_DEBUG is not set
+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
+CONFIG_USB_CHIPIDEA=m
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_PCI=m
+CONFIG_USB_CHIPIDEA_MSM=m
+CONFIG_USB_CHIPIDEA_GENERIC=m
+CONFIG_USB_ISP1760=m
+CONFIG_USB_ISP1760_HCD=y
+CONFIG_USB_ISP1761_UDC=y
+# CONFIG_USB_ISP1760_HOST_ROLE is not set
+# CONFIG_USB_ISP1760_GADGET_ROLE is not set
+CONFIG_USB_ISP1760_DUAL_ROLE=y
#
# USB port drivers
@@ -7312,7 +7358,120 @@ CONFIG_TAHVO_USB=m
CONFIG_USB_ISP1301=m
# end of USB Physical Layer drivers
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_U_SERIAL_CONSOLE=y
+
+#
+# USB Peripheral Controller
+#
+CONFIG_USB_FOTG210_UDC=m
+CONFIG_USB_GR_UDC=m
+CONFIG_USB_R8A66597=m
+CONFIG_USB_PXA27X=m
+CONFIG_USB_MV_UDC=m
+CONFIG_USB_MV_U3D=m
+CONFIG_USB_SNP_CORE=m
+CONFIG_USB_M66592=m
+CONFIG_USB_BDC_UDC=m
+
+#
+# Platform Support
+#
+CONFIG_USB_AMD5536UDC=m
+CONFIG_USB_NET2272=m
+# CONFIG_USB_NET2272_DMA is not set
+CONFIG_USB_NET2280=m
+CONFIG_USB_GOKU=m
+CONFIG_USB_EG20T=m
+CONFIG_USB_MAX3420_UDC=m
+CONFIG_USB_DUMMY_HCD=m
+# end of USB Peripheral Controller
+
+CONFIG_USB_LIBCOMPOSITE=m
+CONFIG_USB_F_ACM=m
+CONFIG_USB_F_SS_LB=m
+CONFIG_USB_U_SERIAL=m
+CONFIG_USB_U_ETHER=m
+CONFIG_USB_U_AUDIO=m
+CONFIG_USB_F_SERIAL=m
+CONFIG_USB_F_OBEX=m
+CONFIG_USB_F_NCM=m
+CONFIG_USB_F_ECM=m
+CONFIG_USB_F_PHONET=m
+CONFIG_USB_F_EEM=m
+CONFIG_USB_F_SUBSET=m
+CONFIG_USB_F_RNDIS=m
+CONFIG_USB_F_MASS_STORAGE=m
+CONFIG_USB_F_FS=m
+CONFIG_USB_F_UAC1=m
+CONFIG_USB_F_UAC1_LEGACY=m
+CONFIG_USB_F_UAC2=m
+CONFIG_USB_F_UVC=m
+CONFIG_USB_F_MIDI=m
+CONFIG_USB_F_HID=m
+CONFIG_USB_F_PRINTER=m
+CONFIG_USB_F_TCM=m
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_PHONET=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_UAC1=y
+CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
+CONFIG_USB_CONFIGFS_F_UAC2=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_CONFIGFS_F_UVC=y
+CONFIG_USB_CONFIGFS_F_PRINTER=y
+CONFIG_USB_CONFIGFS_F_TCM=y
+
+#
+# USB Gadget precomposed configurations
+#
+CONFIG_USB_ZERO=m
+CONFIG_USB_AUDIO=m
+# CONFIG_GADGET_UAC1 is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_G_NCM=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FUNCTIONFS=m
+CONFIG_USB_FUNCTIONFS_ETH=y
+CONFIG_USB_FUNCTIONFS_RNDIS=y
+CONFIG_USB_FUNCTIONFS_GENERIC=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_GADGET_TARGET=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_MIDI_GADGET=m
+CONFIG_USB_G_PRINTER=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_G_NOKIA=m
+CONFIG_USB_G_ACM_MS=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_RNDIS=y
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_G_HID=m
+CONFIG_USB_G_DBGP=m
+# CONFIG_USB_G_DBGP_PRINTK is not set
+CONFIG_USB_G_DBGP_SERIAL=y
+CONFIG_USB_G_WEBCAM=m
+CONFIG_USB_RAW_GADGET=m
+# end of USB Gadget precomposed configurations
+
CONFIG_TYPEC=m
CONFIG_TYPEC_TCPM=m
CONFIG_TYPEC_TCPCI=m
@@ -7844,7 +8003,7 @@ CONFIG_HYPERV_BALLOON=m
#
CONFIG_XEN_BALLOON=y
CONFIG_XEN_BALLOON_MEMORY_HOTPLUG=y
-CONFIG_XEN_BALLOON_MEMORY_HOTPLUG_LIMIT=512
+CONFIG_XEN_MEMORY_HOTPLUG_LIMIT=512
CONFIG_XEN_SCRUB_PAGES_DEFAULT=y
CONFIG_XEN_DEV_EVTCHN=m
CONFIG_XEN_BACKEND=y
@@ -8898,6 +9057,7 @@ CONFIG_PHY_PXA_28NM_USB2=m
CONFIG_PHY_CPCAP_USB=m
CONFIG_PHY_QCOM_USB_HS=m
CONFIG_PHY_QCOM_USB_HSIC=m
+CONFIG_PHY_SAMSUNG_USB2=m
CONFIG_PHY_TUSB1210=m
CONFIG_PHY_INTEL_LGM_EMMC=m
# end of PHY Subsystem